Array Labs builds advanced radar systems to help humanity understand and respond to changes across the physical world.

We’re launching a coordinated fleet of radar satellites to create a high-resolution 3D map of the Earth – updated in real time – enabling faster, smarter decision-making for government and commercial organizations supporting disaster response, infrastructure resilience, and mission-critical geopolitical intelligence.

We design and build our satellites end-to-end, producing the world’s most advanced earth observation satellites. Our fleet will deliver unprecedented levels of accuracy, coverage, and responsiveness to power critical insights precisely where they’re needed most.

About the Job

As a Senior FPGA Engineer, you will develop the FPGA logic and embedded software that drive Array’s radar payloads and on-orbit processing systems. Your work could include designing FPGA modules for high-throughput sensing and data movement, writing and maintaining C/C++ firmware for Zynq UltraScale+ MPSoC devices, or building Linux-based embedded systems using PetaLinux and Yocto, collaborating closely with digital, RF, signal processing, and systems engineers to deliver reliable, high-performance embedded solutions. The software and FPGA architectures you build will directly influence radar timing, data integrity, processing throughput, and system reliability on orbit.

As part of our quickly growing engineering team, you will play a critical role in building the world’s most advanced radar satellite constellation—one that will significantly improve humanity’s ability to rapidly and comprehensively understand our changing planet.

### Responsibilities

Contribute to bring-up and integration of FPGA-based platforms, including Zynq UltraScale+ MPSoCs.

Support the design and implementation of FPGA modules for reliable, high-throughput data movement.

Develop embedded software and firmware that support Array’s radar sensors, communication links, and satellite systems.

Participate in building and maintaining Linux-based embedded systems using tools such as PetaLinux or Yocto.

Create automation, diagnostic, and test tools in Python to accelerate development and validation.

Collaborate across digital, RF, signal processing, and systems teams to evaluate performance, debug issues, and refine embedded architectures.

### Basic Qualifications

Bachelors in Electrical or Computer Engineering, or a related field

5-8 years of experience in FPGA design and development

Experience with Xilinx FPGA design tools and workflows

Experience with embedded C/C++ for firmware development

Excellent teamwork and communication skills

High levels of self-motivation and personal accountability

Ability to work in a fast-paced environment under significant time constraints

### Preferred Skills and Experience

Master’s degree in Computer Science, Electrical Engineering, or a related field

Experience building software for complex embedded systems or custom SoCs

Familiarity with Linux-based embedded systems development (Petalinux/Yocto)

Familiarity with Linux kernel drivers and related HW/SW interfaces

Hands-on experience in FPGA build and deploy processes

Proficiency in Python scripting for automation and testing

Experience with satellite systems or aerospace applications

Ability to read, interpret and modify schematic diagrams

### ITAR Requirements

To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.

### Equal Opportunity Employer:

Array Labs is an Equal Opportunity Employer. Employment decisions are made on the basis of merit, competence, and job qualifications and will not be influenced in any manner by gender, color, race, ethnicity, national origin, sexual orientation, religion, age, gender identity, veteran status, disability status, marital status, mental or physical disability or any other legally protected status.

Interview Process

We will conduct interviews via Google Meet; the typical process takes around 2-4 weeks to complete from start to finish.

Hiring and Compensation Strategy

Our hiring and compensation strategy is simple:

1) find uncommonly good people

2) pay them uncommonly well

You can anticipate competitive pay, with high flexibility between salary and equity-based compensation.

Why Join Array Labs?

Array Labs is launching a constellation of satellites to create the first high-resolution, real-time, three-dimensional model of Earth. Our next-generation satellite technology will offer image quality 60x greater than traditional techniques, profoundly expanding humanity’s ability to understand and respond to events on a global scale.

In forging an affordable, accessible, accurate representation of Earth, our work has the potential to transform the face of dozens of fields, including autonomy, telecommunications, disaster relief, gaming, climate science, defense and construction.

Senior FPGA Engineer

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