Senior Firmware Engineer - PCIe/CXL Memory Solutions

Astera Labs is seeking experienced Senior Firmware Engineer PCIe/CXL Memory Solution to lead the design and development of embedded firmware for cutting-edge PCIe/CXL memory expansion products tailored for AI and Cloud infrastructure. This role is pivotal in enabling next-generation memory devices that power high-performance computing platforms. This position will be required onsite.

Required Experience:

• Bachelor’s degree in Electrical Engineering, Computer Science, or a related technical field.
• 5+ years of hands-on experience in embedded firmware development using C.
• Deep expertise in low-level firmware for hardware bring-up, traffic enablement, and RAS (Reliability, Availability, Serviceability) feature implementation.
• Proven track record working with high-speed interfaces and protocols such as PCIe, CXL, DDR, and I2C.
• Hands on experience in CPU to Device, Device to Device flows like MMIO, DMA, PCIe P2P.

Key Responsibilities & Skills:

• Firmware development, bring-up, and validation of PCIe/CXL/DDR interfaces at PHY and Link layers.
• Interpret technical specifications and develop robust, low-level C code in RTOS environments.
• Collaborate effectively with cross-functional teams and external partners to deliver weekly firmware releases and feature demonstrations.
• Strong debugging skills and ability to triage and resolve issues in complex embedded systems.
• Familiarity with server I/O and memory workflows, performance tuning for latency and bandwidth optimization is a plus.
• Experience with pre-silicon validation in emulation environments is desirable.