Electrical Engineer, Display Test Systems, Raxium

Minimum qualifications:

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
  
• 4 years of experience in test systems engineering or hardware design.
• 4 years of experience writing object-oriented Python for instrument control.
• 4 years of experience working with concurrency and VISA communications.
• 4 years of experience designing and validating PCBs (Altium/Cadence), specifically for semiconductor test interfaces or precision analog applications.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering, Physics, or a related field.
• Experience designing load boards, probe cards, or DUT (Device Under Test) boards for wafer-level testing.
• Experience using software platforms and tools in a collaborative hardware/software team.
• Proven track record of reducing test times in a manufacturing environment through software or hardware innovation.
• Understanding of SMU (Source Measure Unit) ranges, aperture times, NPLC (Number of Power Line Cycles) settings, and how these parameters impact total test time.
• Familiarity with diode IV curves, pixel driver circuits, or optical measurement integration.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.

The US base salary range for this full-time position is $147,000-$216,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Responsibilities

• Architect and maintain the Python-based control software for full-display measurement systems. Develop robust drivers for SMUs (Keithley/Keysight), programmable power supplies and switch matrices, balancing measurement precision with execution speed.
• Profile the interaction between code and hardware. Identify bottlenecks-whether in the USB bus, the SMU settling time, or the software thread, and re-architect the sequence to maximize throughput.
• Solve routing challenges to manage current density and thermal loads while maintaining product area-level leakage performance on high-impedance nodes. Design high-sensitivity DC interface boards capable of simultaneously energizing thousands of microLEDs.
• Define the technical specifications for wafer-level probe cards and manage vendors to ensure mechanical and electrical signal integrity at the contact-point.
• Bridge gap between electrical test and manufacturing yield. Use JMP, SQL, Python/pandas to analyze large parametric datasets and correlate hardware performance with device behavior.