Digital Design Engineer
Meta.com
142k - 203k USD/year
Office
Sunnyvale, CA | Redmond, WA
Full Time
We are looking for a Digital Design Engineer to support our Reality Labs Silicon AI Research team. We build research silicon to demonstrate and integrate advanced IP and AI accelerators into SOC/ASIC solutions to enable in-system testing and prototyping. The goal is to de-risk new IP/accelerators, prove out advanced compute/memory architectures and to harden controls/algorithms for next generation AI and AR solutions.
As a Digital Design Engineer (DDE), you will be a key contributor in planning and executing our front-end digital design efforts at the IP and sub-system levels. Additionally, this role includes hardware and software codesign and supporting post silicon firmware development. From microarchitecture definition and RTL implementation to firmware development and system software, fundamentals in digital design and C will enable you to contribute to all phases of the chip development. Additionally, effective collaboration and communication with Digital Design Engineers, Digital Verification Engineers, Research Scientists and cross functional teams will be key to your success.Digital Design Engineer Responsibilities
$142,000/year to $203,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
Equal Employment Opportunity Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here. Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, fill out the Accommodations request form.
As a Digital Design Engineer (DDE), you will be a key contributor in planning and executing our front-end digital design efforts at the IP and sub-system levels. Additionally, this role includes hardware and software codesign and supporting post silicon firmware development. From microarchitecture definition and RTL implementation to firmware development and system software, fundamentals in digital design and C will enable you to contribute to all phases of the chip development. Additionally, effective collaboration and communication with Digital Design Engineers, Digital Verification Engineers, Research Scientists and cross functional teams will be key to your success.Digital Design Engineer Responsibilities
- Contribute to microarchitectural feature definition, RTL design, design verification and project planning
- Deliver quality RTL in collaboration with Digital Verification (DV)
- Support back end physical design (PD) through STA and SDCs
- Develop system tests in C for custom hardware
- Help create and maintain design documentation including IP/SoC Micro Architecture document (collaborator/owner), IP/SoC Design plan (collaborator) and SoC/chip bringup/validation plan (collaborator)
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
- 6+ years of experience in digital design, hardware engineering or related experience
- Communication and collaboration skills
- Knowledge of digital SoC integration and ASIC architecture
- Skilled in micro-architecture, RTL coding, design verification and SoC Integration of complex IPs
- Experience in CDC, SDC and STA
- Self directed and detail oriented in all phases of Design Digital and firmware development
- Python (or similar) scripting experience
- Familiarity with low-power design techniques
- Knowledge of common industry interfaces like AXI, APB, I3C, SPI, UART, etc
- Experience using C for system verification
- Experience developing RTOS drivers in C
- Familiar with IP, sub-system and SoC DV, able to execute DV working with DV lead
- Some familiarity with compute and/or memory architectures for ultra low power applications
- Master's degree in Electrical Engineering, Computer Engineering, relevant technical field, or equivalent practical experience
$142,000/year to $203,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
Equal Employment Opportunity Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here. Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, fill out the Accommodations request form.
Digital Design Engineer
Office
Sunnyvale, CA | Redmond, WA
Full Time
142k - 203k USD/year
October 4, 2025