Design Verification, SOC Engineering, Senior / Staff Engineer in District 7
Synopsys Inc.com
Office
Ho Chi Minh, Viet Nam
Full Time
General Information
Job Title Design Verification, SOC Engineering, Senior / Staff Engineer in District 7 Job ID 12628 Country Viet Nam City Ho Chi Minh Date Posted 26-Aug-2025 Job Category Engineering Job Subcategory SOC Engineering Hire Type Employee Remote Eligible NoDescriptions & Requirements
Job Description and RequirementsAlternate Job Titles:
- Design Verification, SOC Engineering, Senior / Staff Engineer
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You’re an experienced ASIC/SOC verification engineer, passionate about working with advanced digital systems and protocols. You’re eager to collaborate with global teams, leverage industry-leading tools, and continuously expand your expertise in verification methodologies. Your strong communication skills and drive for innovation make you a valuable team contributor.
What You’Ll Be Doing:
- Develop and maintain verification environments for SoC sub-systems (USB, PCIe, DDR, etc.).
- Work directly with US-based experts to execute verification strategies.
- Utilize Synopsys tools (VCS, Verdi, DVE) for simulation and debugging.
- Automate verification tasks using Perl and Shell scripting in UNIX.
- Document and communicate verification results.
- Contribute to technical reviews and ongoing process improvements.
The Impact You Will Have:
- Ensure robust, high-performance silicon solutions.
- Accelerate time-to-market for advanced SoCs.
- Enhance design quality through rigorous testing.
- Promote best practices across global teams.
- Support the adoption of new protocols and methodologies.
- Strengthen Synopsys’ industry leadership.
What You’Ll Need:
- 3.5–8 years ASIC verification experience.
- Proficiency in UNIX, Perl/Shell scripting, and Verilog/SystemVerilog.
- Experience with Synopsys verification tools (VCS, Verdi, DVE).
- Strong English communication skills.
- Knowledge of UVM/Formal Verification and major protocols (USB, PCIe, DDR) is a plus.
Who You Are:
- Team-oriented, proactive, and adaptable.
- Detail-focused and committed to quality.
- Effective communicator and fast learner.
The Team You’Ll Be A Part Of:
Join our collaborative Design Verification team, working closely with US and global experts on leading-edge semiconductor projects.
Rewards And Benefits:
We offer comprehensive health, wellness, and financial benefits. Your recruiter will share more about salary and benefits during the hiring process.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
Design Verification, SOC Engineering, Senior / Staff Engineer in District 7
Office
Ho Chi Minh, Viet Nam
Full Time
September 30, 2025