DRAM Design Senior Layout Engineer
Micron Technology.com
Office
Jalisco, Mexico
Full Time
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
Job Description:
For more than 43 years, Micron Technology, Inc. has redefined innovation with the world’s most sophisticated memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are redefining how the world uses information to enrich life.
Our team vision is a continuing desire to develop your skills working in a multicultural Team across worldwide geographies! Enabling the creative career path you deserve with a collaborative environment and groundbreaking technology and growing upon your imagination and creativity.
We are looking for a DRAM Layout Engineer in our DRAM Engineering Group (DEG) at Micron Technology, Inc., As a Layout Engineer, you will be working with an exceptionally hardworking, passionate team collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Will also Plan and document layouts, sharing material for global teams to review and use.
- Responsible for Design and development of IP layouts used in DRAM chips.
- Perform layout verification like LVS/DRC/EM, quality check and documentation.
- Responsible for timely delivery of block-level layouts with acceptable quality.
- Guide and lead unexperienced team-members in their execution of Sub block-level layouts & review their work.
Minimum Qualifications:
- Must have at least 5 years of validated experience in analog layout designs in CMOS process.
- Experience performing IP layout development and physical verification activities for complex designs as per provided specs.
- Should have solid knowledge of the layout area and routing optimization, design rules, yield and reliability issues.
- Experience with Cadence tools including Virtuoso schematic editor Virtuoso layout L, XL & Verification tools like Mentor Calibre- Proficient in Device Matching, Parasitic Analysis, Electron Migration, and Isolation Techniques.
Preferred Qualifications:
- Should have adequate knowledge of schematics, collaborating with circuit design and CAD team
- Good understanding of layout fundamentals i.e. Electro-migration, Latch-up, coupling, crosstalk, IR-drop, parasitic analysis, matching, shielding, etc.
- Understanding layout effects on the circuit such as speed, capacitance, power and area.
Education
Bachelor's, Master's, PhD or equivalent in Electronics, Physics, Electricity or related.
"The specified role does not encompass the following responsibilities: Finalization of sales agreements or the execution of sales contracts is prohibited. The role also does not carry the authority to make definitive decisions regarding contracts, be it their conclusion or termination. Furthermore, the role is not designed to involve participation in pricing negotiations or the authorization of contracts. These activities fall beyond the permissible duties of the position."
We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.
To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_na@micron.com
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.
Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.
DRAM Design Senior Layout Engineer
Office
Jalisco, Mexico
Full Time
September 18, 2025