Description

Chain Reaction designs and builds hardware that fuels disruptive blockchain technologies by accelerating compute performance. Our world-class teams are transforming the future of data, creating the infrastructure that will power the next generation of secure, scalable, green computing. The main bottleneck in scaling cutting-edge solutions in privacy tech, data analysis, and real-time computing is acceleration – existing hardware cannot keep up with data processing needs. Chain Reaction’s products reshape how data is processed and used on a global scale, and we’re looking for the brightest people to join us.

As a Senior Software Architect, you will lead the design and integration of our software stack, ensuring seamless interaction between hardware-accelerated computation and embedded firmware running on ASIC, to high-performance system-level software orchestrating large-scale computations across multiple devices. You will work closely with hardware, cryptography, and software teams and be a key-decision-maker in software architecture choices, ensuring scalability, performance, and maintainability across the entire system.

We offer the Opportunity to deeply influence cutting-edge privacy-preserving technology with the highest performance.

Influence both silicon-level and large-scale system design

Work with highly skilled multidisciplinary counterparts

Responsibilities

Define the overall software architecture for multi-accelerator system integration.
Collaborate with the ASIC firmware team to ensure smooth HW/SW integration.
Create and maintain software design documents, API specifications, communication protocols and interface definitions.
Work with system software teams to design high-performance orchestration, scheduling, and data flow for FHE workloads.
Evaluate and integrate middleware, libraries, and frameworks that enhance performance and security.
Perform architectural reviews and provide technical mentorship to development teams.
Participate in hardware architecture discussions to influence ASIC feature definition from a software perspective.
Drive performance optimization, reliability, and scalability across all software layers
Guide software development teams on architectural best practices, coding standards, and system design patterns.
Contribute to strategic planning, roadmap development, and cross-functional alignment

Requirements

10+ years in software engineering, including 5+ years in a software architecture or technical leadership role.
Proven experience in embedded systems and system-level software design.
Experience in multi-device or distributed systems architecture.
Experience with hardware-software co-design, embedded systems, or ASIC integration
Strong knowledge of C/C++ and Python.
Background in performance optimization for compute-intensive workloads.
Experience defining APIs, communication protocols, and software-hardware interfaces.
Familiarity with Linux internals, build systems, and deployment strategies.
Strong collaboration and communication skills, with ability to work across hardware, firmware, and software teams

Nice to Have

Experience with cryptography, FHE, or privacy-enhancing technologies.
Knowledge of RISC-V, RDMA, InfiniBand, or RoCE.
Experience with high-throughput computing, HPC, or GPU/accelerator programming models.
Familiarity with Yocto, Buildroot, or embedded Linux distributions.
Familiarity with telemetry systems, workload managers, and datacenter orchestration
Background in cloud infrastructure, client-server architectures, or security engineering
Background in ASIC design influence from the software perspective.