Job Details:

Job Description: 

• In this position, you will be working in a team of enthusiastic engineers on High Speed Designs in P and R from RTL to GDSII.
• You will be part of ACE Group, in the P-Core design team driving Intel's latest CPU's in the latest process technology.
• Your responsibilities will include but not limited to:
• Meet the design targets of high performance and low-power digital design.Static timing analysis.
• Power Optimization: Design Convergence Experience at IP, SoC level.
• Ability to work in a highly dynamic environment across geographies.
• Back end design and implementation of new features.
• Post silicon performance push activities.
• PPA improvement and Methodology improvements

Qualifications:

• You must possess a Masters Degree in Electrical or Computer Engineering with atleast 8 or more years of experience in related field or a Bachelors Degree with at least 10 years of experience.
• Technical Expertise in Synthesis, Placement, CTS, Post-Route Optimization and P and R tools (CDNS and SNPS)
• Preferred Qualifications: -
• Familiarity with Verilog/ VHDL - Tcl, Perl, Python scripting
• Strong verbal and written communication skills

          

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

Business group:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.