Company Description

Join a multibillion-dollar global company that brings together amazing technology, people, and operational scale to become a powerhouse in the memory industry. Headquartered in Rancho Cordova, California, Solidigm combines elements of an established, successful technology company with the spirit, agility, and entrepreneurial mindset of a start-up. In addition to the U.S. headquarters and other facilities in the U.S., the company has international presence in Asia, Europe, and the Americas. Solidigm will continue to lead the world in innovating new Memory technologies with aspirations to be the #1 NAND memory company in the world. At Solidigm, we view problems as opportunities to define innovative solutions that hold the power to change the world and unleash the potential technological needs that the future holds. At Solidigm, we are One Team that fosters a diverse, equitable, and inclusive culture that embraces individual uniqueness and empowers us to bring our best selves to deliver excellence in support of Solidigm's vision and mission to be the go-to partner for optimized data storage solutions. You can be part of the takeoff of an innovative business that develops cutting-edge products, delivers strong business value for customers, provides an engaging workplace for its employees, and serves a greater impact on the world. This is a golden opportunity for the right applicant to join us and help design, build, and lead Solidigm. We want a diverse team of dedicated professionals who will not just be Solidigm team members but contribute to how we shape the future of the organization. We are seeking applicants who will grow and thrive in our culture; be customer inspired, trusting, innovative, team-oriented, inclusive, results driven, collaborative, passionate, and flexible.

Job Description

-Responsible for RTL-to-GDS synth/apr large logic partition of 3D NAND design -Drive design flow improvement from existing DC/ICC2 to Fuse-Compiler R2G -MS with 4+ years or BS with 7+ years of experience in BE design

In this role, you will drive advanced RTL-to-GDS process of the several large logic controller partitions of 3D NAND chip design. This involves synthesis, place-and-route, timing closure, post-r2g to schematic conversion on Virtuoso, and layout DRC. You'll also help drive the flow improvement from the existing DC/ICC2 flow to the more advanced Fusion Compiler flow

Qualifications

-MS with 4+ years or BS with 7+ years of experience in BE design

-Expert knowledge of System-Verilog

-Expert in Synthesis, Place & Route, PrimeTime, and DRC

-Expert in DC/ICC2 and Fusion-Compiler tool set/env

-Strong knowledge of design PDK esp. stdcell

-Strong background in physical layout design and layout verification

-Solid Virtuoso schematic/layout environment

-Desired knowledge of NVM NAND algo controller

Additional Information

The compensation range for this role is $119,130 - $178,690. Actual compensation is influenced by a variety of factors including but not limited to skills, experience, qualifications, and geographic location.

Logic Back-End Synthesis APR Structural Design Engineer

Solidigm