ASIC Implementation Engineer - Static Verification
Meta
142k - 203k USD/year
Office
Sunnyvale, CA | Austin, TX
Full Time
Meta is hiring ASIC Implementation Engineers within our Infrastructure organization.ASIC Implementation Engineer - Static Verification Responsibilities
$142,000/year to $203,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
Equal Employment Opportunity Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here. Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, fill out the Accommodations request form.
- Perform Flat and Hierarchical Clock Domain Crossing and work with the designers to analyze the complex clock domain crossings and sign off the CDC
- Perform Flat and Hierarchical Reset Domain crossing Checks. Understand the Reset-Architecture by working with Design and Firmware teams and develop reset groups and the corresponding reset sequence for RDC
- Perform RTL Lint and work with the Designers to create waivers
- Perform RTL Design for Testability Analysis and improve the Design for Testability coverage for Stuck-at faults
- Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for Timing, Area, Power
- Developing Automation scripts and Methodology for all Front-end tools including (Lint, CDC, RDC,)
- Work closely with the Design Engineers, DV Engineers, Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
- 6+ years of experience in static verification tools
- Experience with Lint, Clock Domain & Reset Domain crossing
- Experience with SOC CDC signoff
- Knowledge of SOC Integration (Clocking, Reset, PLL, etc)
- Knowledge of front-end ASIC flows
- Experience with RTL design using SystemVerilog or other Hardware Description Language
- Experience with communicating across functional internal teams and vendors
- Scripting and programming experience using Perl/Python, TCL, and Make
- Experience with SOC Design Integration and Front-End Implementation
- Knowledge of Timing/physical libraries, SRAM Memories
- Experience with Netlist CDC Analysis and improving Mean Time Between Failures
- Experience with Design Compiler, Spyglass, PrimeTime, Formality or equivalent tools
- Experience with developing structural rule based checks for RTL & Netlist
$142,000/year to $203,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
Equal Employment Opportunity Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here. Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, fill out the Accommodations request form.
ASIC Implementation Engineer - Static Verification
Office
Sunnyvale, CA | Austin, TX
Full Time
142k - 203k USD/year
August 9, 2025