ASIC Engineer, Infra Silicon Pre/Post Silicon Validation Lead
Meta
173k - 249k USD/year
Office
Sunnyvale, CA | Menlo Park, CA
Full Time
Meta is hiring ASIC Engineers within the Infrastructure organization. We are looking for individuals with experience in the Pre/Post Silicon Validation to build and scale silicon for data center applications.
As an ASIC Engineer in the Infra Silicon Enablement team, you will be part of a dynamic team working with the best in the industry, focused on developing and supporting innovative ASIC solutions for Meta’s data center applications.ASIC Engineer, Infra Silicon Pre/Post Silicon Validation Lead Responsibilities
$173,000/year to $249,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
Equal Employment Opportunity Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here. Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, fill out the Accommodations request form.
As an ASIC Engineer in the Infra Silicon Enablement team, you will be part of a dynamic team working with the best in the industry, focused on developing and supporting innovative ASIC solutions for Meta’s data center applications.ASIC Engineer, Infra Silicon Pre/Post Silicon Validation Lead Responsibilities
- Work across all aspects of silicon lifecycle to deliver reliable and performant silicon solutions. From early architecture and design inputs, pre-silicon test readiness/validation, post-silicon bring-up, validation, characterization and deployment in fleet
- Create/develop validation plan, tests and automation tool sets targeted at silicon validation and productization. Inclusive of, but not limited to silicon diagnostics, performance analysis, debug tools, bare metal and full stack systems, from early labs to data center deployments
- Understand production system use cases to improve silicon validation
- Provide feedback into next generation architecture and design with insights from the production fleet
- Root-cause, resolve and remediate issues with silicon across the product lifecycle
- Lead end-to-end silicon validation effort, driving strategy, planning, execution, and post-silicon enablement to ensure successful product delivery
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
- 8+ years of experience with ASIC development cycles, Pre/Post Silicon Validation
- 8+ years of experience with troubleshooting, debug and analytics for Silicon products
- Experience in Python, C/C++ and/or similar languages (data structures, algorithms, and OOP)
- Experience working with internal and external partners for ASIC and/or systems development
- Experience in ASIC Design or Development, Emulation and Post Silicon validation
- Experience working with Emulation/FPGA platforms for test content development, debug and enablement on post silicon
- Experience with some of the following modules/domains: PCIe, Networking, Ethernet, Flash, Memory, CPU, GPU, DRAM (LP/DDR4/5 and/or HBM)
- Experience with Application, Host Driver development etc is plus
- Understanding of embedded systems, including common bus protocols such as I2C, SPI, USB, and/or PCIe
- Experience with Linux systems and server systems management
- Experience with RDMA Gen Driver, DPDK, Application, Host Driver development is a plus
$173,000/year to $249,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
Equal Employment Opportunity Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here. Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, fill out the Accommodations request form.
ASIC Engineer, Infra Silicon Pre/Post Silicon Validation Lead
Office
Sunnyvale, CA | Menlo Park, CA
Full Time
173k - 249k USD/year
August 9, 2025