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DFT Design Engineering Graduate Talent

Altera

Office

Penang 15, Penang, Malaysia

Full Time

Job Details:

Job Description:

Contribute to DFT implementation of scan insertion and coding, pattern generation, verification, test coverage analysis and improvement for FPGA complex IP sub-systems.

Work collaboratively with the global DFT teams, the design partners and manufacturing engineers to implement innovative DFT solutions to Altera FPGA product families.

The ideal candidate will have the following behavioral traits:

We are looking for an individual who consistently look for ways to do things more efficiently while upholding quality.

Passionate in solving problems, ability to synthesize data and translate into data driven proposals and decisions.

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.


Minimum Qualifications:

Bachelor or Master in Electrical/Electronics/Computer Engineering or related field.

Good understanding of the ASIC design flow as well as the DFT and Manufacturing requirements

Proficiency in scripting languages such as TCL/TK/PERL/Python.

Job Type:

Contract Employee (Fixed Term)

Shift:

Shift 1 (Malaysia)

Primary Location:

Penang 15, Penang, Malaysia

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

DFT Design Engineering Graduate Talent

Office

Penang 15, Penang, Malaysia

Full Time

July 3, 2025

company logo

Altera

AlteraFPGA_